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The prototype of time digitizing system for the upgrade of BESIII endcap TOF(ETOF) is introduced in this paper. The ETOF readout electronics has aformation of distributed architecture that hit signal from multi-gap resistiveplate chamber (MRPC) is signaled as LVDS by front-end electronics (FEE) andsent to the back-end time digitizing system via long shield differentialtwisted pair cables. The ETOF digitizing system consists of 2 VME crates eachof which contains modules of time digitizing, clock, trigger and fast controletc. The time digitizing module (TDIG) of this prototype can support up to 72electrical channels of hit information measurement. The fast control (FCTL)module can operate at barrel or endcap mode. The barrel FCTL fans fast controlsignals from the trigger system out to endcap FCTLs, merges data from endcapsand transfers to the trigger system. Without modifying the barrel TOFstructure, this time digitizing architecture benefits for improving ETOFperformance without degrading barrel TOF measuring. Lab experiments show thatthe time resolution of this digitizing system can be less than 20ps, and thedata throughput to DAQ can be about 92Mbps. Beam experiments show that thecomplete time resolution can be less than 45ps.

Prototype of time digitizing system for BESIII endcap TOF upgrade