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This paper presents a system consisting of the FPGA IP core, the simplenetwork protocol and the Linux device driver, capable of efficient and reliabledata transmission from a low resources FPGA chip to the Linux-based embeddedcomputer system, via a private Ethernet network (consisting of a single segmentor a few segments connected via an Ethernet switch). The embedded system mayoptionally process the acquired data, and distribute them further, usingstandard network protocols. Proposed design targets cost-efficient multichanneldata acquisition systems, in which multiple FPGA based front end boards (FEB)should transmit the stream of acquired data to the computer network,responsible for their final processing and archiving. The presented solutionallows to minimize the cost of data concentration due to use of inexpensiveEthernet network infrastructure. The work is mainly focused on minimization ofresources consumption in the FPGA, and minimization of acknowledge latency inthe Linux based system - which allows to achieve high throughput in spite ofuse of inexpensive FPGA chips with small internal memory.

Efficient transmission of measurement data from FPGA to embedded system via Ethernet link