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Security is the most important part in data communication system, where morerandomization in secret keys increases the security as well as complexity ofthe cryptography algorithms. As a result in recent dates these algorithms arecompensating with enormous memory spaces and large execution time on hardwareplatform. Field programmable gate arrays (FPGAs), provide one of the majoralternative in hardware platform scenario due to its reconfiguration nature,low price and marketing speed. In FPGA based embedded system we can useembedded processor to execute particular algorithm with the inclusion of a realtime operating System (RTOS), where threads may reduce resource utilization andtime consumption. A process in the runtime is separated in different smallertasks which are executed by the scheduler to meet the real time dead line usingRTOS. In this paper we demonstrate the design and implementation of a 128-bitAdvanced Encryption Standard (AES) both symmetric key encryption and decryptionalgorithm by developing suitable hardware and software design on XilinxSpartan- 3E (XC3S500E-FG320) device using an Xilkernel RTOS, the implementationhas been tested successfully The system is optimized in terms of executionspeed and hardware utilization.

Design and implementation of real time AES-128 on real time operating system for multiple FPGA communication