English (United Kingdom)

https://curated-unify.zendy.io/wp-json/zendy-region/v1/featured_content/oa?rat=en

https://curated-unify.zendy.io/wp-json/zendy-region/v1/highlighted_journal/

Zendy Plus

Presents the access of premium content as premium feature

Premium Content

Presents the keyphrase highlighting as premium feature

Keyphrase Highlighting

Presents the summarisation as premium feature

Summarisation

Insights

Presents the pdf analysis as premium feature

PDF Analysis

Presents the zaia usage as premium feature

ZAIA

Zendy Tools

Zendy Open

Besides the lot of advantages offered by the 3D stacking of devices in anintegrated circuit there is a chance of device damage due to rise in peaktemperature value. Hence, in order to make use of all the potential benefits ofthe vertical stacking a thermal aware design is very essential. The first stepfor designing a thermal aware architecture is to analyze the hotspottemperature generated by the devices. In this paper we are presenting theresults of our thermal analysis experiments of a 3D heterogeneous structurewith three layers. The bottom layer had eight identical processors at 2.4 GHzand the top layer was with four memory units. The intermediate layer was athermal interface material (TIM). The 2D thermal analysis of the top and bottomlayers was also done separately. In the next step simulations were carried outby varying TIM thickness and conductivity to study its affect on hotspottemperature so as to optimize the temperature distribution.

Thermal analysis & optimization of a 3 dimensional heterogeneous structure