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Combinational or Classical logic circuits dissipate heat for every bit ofinformation that is lost. Information is lost when the input vector cannot berecovered from its corresponding output vector. Reversible logic circuitimplements only the functions having one-to-one mapping between its input andoutput vectors and therefore naturally takes care of heating. Reversible logicdesign becomes one of the promising research directions in low powerdissipating circuit design in the past few years and has found its applicationin low power CMOS design, digital signal processing and nanotechnology. Thispaper presents the efficient approaches for designing fault tolerant reversiblefast adders that implement carry look-ahead and carry-skip logic. The proposedhigh speed reversible adders include MIG gates for the realization of its basicbuilding block. The MIG gate is universal and parity preserving. It allows anyfault that affects no more than a single signal readily detectable at thecircuit's primary outputs. It has also been demonstrated that the proposeddesign offers less hardware complexity and is efficient in terms of gate count,garbage outputs and constant inputs than the existing counterparts.

Efficient Approaches for Designing Fault Tolerant Reversible Carry Look-Ahead and Carry-Skip Adders