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For nanoscale CMOS applications, strained-silicon devices have been receivingconsiderable attention owing to their potential for achieving higherperformance and compatibility with conventional silicon processing. In thiswork, an analytical model for the output current characteristics (I-V) ofnanoscale bulk strained-Si/SiGe MOSFETs, suitable for analog circuitsimulation, is developed. We demonstrate significant current enhancement due tostrain, even in short channel devices, attributed to the velocity overshooteffect. The accuracy of the results obtained using our analytical model isverified using two-dimensional device simulations.

Analytical Drain Current Model of Nanoscale Strained-Si/SiGe MOSFETs for Analog Circuit Simulation