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In this paper we report a new PNP Surface Accumulation Layer Transistor(SALTran) on SOI which uses the concept of surface accumulation of holes nearthe emitter contact to significantly improve the current gain. Usingtwo-dimensional simulation, we have evaluated the performance of the proposeddevice in detail by comparing its characteristics with those of the previouslypublished conventional PNP lateral bipolar transistor (LBT) structure. From oursimulation results it is observed that depending on the choice of the emitterdoping and the emitter length, the proposed SALTran exhibits a current gainenhancement of around 20 times that of the compatible lateral bipolartransistor without deteriorating the cut-off frequency. We have discussed thereasons for the improved performance of the SALTran based on our detailedsimulation results.

Realizing high current gain PNP transistors using a novel Surface Accumulation Layer Transistor (SALTran) concept