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DDR SDRAM is similar in function to the regular SDRAM but doubles thebandwidth of the memory by transferring data on both edges of the clock cycles.DDR SDRAM most commonly used in various embedded application like networking,image or video processing, Laptops ete. Now a days many applications needs moreand more cheap and fast memory. Especially in the field of signal processing,requires significant amount of memory. The most used type of dynamic memory forthat purpose is DDR SDRAM. For FPGA design the IC manufacturers are providingcommercial memory controller IP cores working only on their products. Maindisadvantage is the lack of memory access optimization for random memory accesspatterns. The data path part of those controllers can be used free of charge.This work propose an architecture of a DDR SDRAM controller, which takesadvantage of those available and well tested data paths and can be used for anyFPGA device or ASIC design.(5). In most of the SOC design, DDR SDRAM iscommonly used. ARM processor is widely used in SOCs; so that we focused toimplement AHB compatible DDR SDRAM controller suitable for ARM based SOCdesign.

Ahb Compatible DDR Sdram Controller Ip Core for Arm Based Soc