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The aim of this paper is to present an adaptable Fat Tree NoC architecturefor Field Programmable Gate Array (FPGA) designed for image analysisapplications. Traditional NoCs (Network on Chip) are not optimal for dataflowapplications with large amount of data. On the opposite, point to pointcommunications are designed from the algorithm requirements but they areexpensives in terms of resource and wire. We propose a dedicated communicationarchitecture for image analysis algorithms. This communication mechanism is ageneric NoC infrastructure dedicated to dataflow image processing applications,mixing circuit-switching and packet-switching communications. The completearchitecture integrates two dedicated communication architectures and reusableIP blocks. Communications are based on the NoC concept to support the highbandwidth required for a large number and type of data.

Evaluation and Design Space Exploration of a Time-Division Multiplexed NoC on FPGA for Image Analysis Applications