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The best way of decoding against random errors is to compute the received sequence with every possible code sequence. This is called maximum likelihood (ML) decoding. The criterion for deciding between two paths is to select the one having the smaller metric. The rule maximizes the probability of a correct decision. The Andrew Viterbi proposed an efficient algorithm to find the minimum distance to received sequence in a trellis. It's named after him as Viterbi algorithm (VA). This was recognized by Forney to be Maximum Likelihood decoder. The Viterbi algorithm occupies large memory and computational resources. To address this problem Proposed Viterbi Algorithm is introduced. The Proposed Viterbi decoder functionally is same as the previous Viterbi decoder but it reduces memory and the hardware resources. The proposed block diagram checks every node for path metric value and eliminates the path that is found if it is not having minimum distance.

Implementation of reduced memory Viterbi Decoder using Verilog HDL