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Pick and Place Process Optimization for Thin Semiconductor Packages
Author(s) -
Rennier S. Rodriguez,
Frederick Ray I. Gomez
Publication year - 2019
Publication title -
journal of engineering research and reports
Language(s) - English
Resource type - Journals
ISSN - 2582-2926
DOI - 10.9734/jerr/2019/v4i216897
Subject(s) - ball grid array , gadget , manufacturing engineering , computer science , grid , process (computing) , die (integrated circuit) , engineering , mechanical engineering , materials science , algorithm , soldering , geometry , mathematics , operating system , composite material
Nowadays, electronic manufacturers trend are to become thinner and thinner especially those electronic gadgets that is very handy and convenient on our daily necessity. Challenge with the leading manufacturers is the production and development of less size gadget yet with richness of available application and uses that we can work on with what can please its consumer for their convenience and satisfaction. As with the semiconductor company, correlation between becoming thinner versus manufacturing capability become significantly opposite, as the package become thinner the more complex its related process can be. This study covers innovative approach in die attach station on critical handling of thin die packages. Lessons and learning were documented from Ball Grid Array (BGA) packages as first to be evaluated with thin package requirements. Also discussed herewith are documented defects and related issues during trials and die attach builds that has been a show stopper on its early production.

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