English (United Kingdom)

https://curated-unify.zendy.io/wp-json/zendy-region/v1/featured_content/oa?rat=en

https://curated-unify.zendy.io/wp-json/zendy-region/v1/highlighted_journal/

Global: Zendy Plus annual

Presents the access of premium content as premium feature

Premium Content

Presents the keyphrase highlighting as premium feature

Keyphrase Highlighting

Presents the summarisation as premium feature

Summarisation

Insights

Presents the pdf analysis as premium feature

PDF Analysis

Presents the zaia usage as premium feature

ZAIA

Global: Zendy Plus monthly

Global: Zendy Tools annual

Global: Zendy Tools monthly

Global: Zendy Free Plan

The importance of the analogue part in integrated electronic systems cannot be overstressed. Despite its eminence, and unlike the digital design, the analogue design has not so far been automated to a great extent, mainly due to its towering complexity (Dastidar et al., 2005). Analogue sizing is a very complicated, iterative and boring process whose automation is attracting great attention (Medeiro et al., 1994). The analogue design and sizing process remains characterized by a mixture of experience and intuition of skilled designers (Tlelo-Cuautle & Duarte-Villasenor, 2008). As a matter of fact, optimal design of analogue components is over and over again a bottleneck in the design flow. Optimizing the sizes of the analogue components automatically is an important issue towards ability of rapidly designing true high performance circuits (Toumazou & Lidgey, 1993; Conn et al., 1996). Common approaches are generally either fixed topology ones or/and statistical-based techniques. They generally start with finding a “good” DC quiescent point, which is provided by the skilled analogue designer. After that a simulation-based tuning procedure takes place. However these statistic-based approaches are time consuming and do not guarantee the convergence towards the global optimum solution (Talbi, 2002). Some mathematical heuristics were also used, such as Local Search (Aarts & Lenstra, 2003), Simulated Annealing (Kirkpatrick et al., 1983; Siarry(a) et al., 1997), Tabu Search (Glover, 1989; Glover, 1990), Genetic Algorithms (Grimbleby, 2000; Dreo et al., 2006), etc. However these techniques do not offer general solution strategies that can be applied to problem formulations where different types of variables, objectives and constraint functions are used. In addition, their efficiency is also highly dependent on the algorithm parameters, the dimension of the solution space, the convexity of the solution space, and the number of variables. Actually, most of the circuit design optimization problems simultaneously require different types of variables, objective and constraint functions in their formulation. Hence, the abovementioned optimization procedures are generally not adequate or not flexible enough. In order to overcome these drawbacks, a new set of nature inspired heuristic optimization algorithms were proposed. The thought process behind these algorithms is inspired from

A Particle Swarm Optimization Technique used for the Improvement of Analogue Circuit Performances