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The chapter is intended to provide the reader with means to reduce low‐frequency noise in Metal‐Oxide‐Semiconductor Field‐Effect‐Transistor (MOSFET). It is demonstrated that low‐resistivity source and drain electrodes can greatly lower the low‐frequency noise level by suppressing their contribution to the total noise. Furthermore, new plasma processes having the advantages to work at low electron temperature can achieve a further reduction, thanks to the fabrication of a better gate oxide and to a reduction of damages generally induced by conventional plasma processes. Reducing the impact of the traps on the carrier flowing inside the channel by burying the channel can also achieve a reduction of the noise level, but unfortunately at the cost of a degradation of the electrical performances. Finally, the noise analysis of the low‐ frequency noise in accumulation‐mode MOSFETs showed that these newly developed devices have a lower noise level than conventional structures, which, in addition to their superiority in term of electrical performances, establishes them as a serious platform for the next Complementary Metal‐Oxide‐Semiconductor Field‐Effect‐Transistor (CMOS) technology.

New Processes and Technologies to Reduce the Low‐Frequency Noise of Digital and Analog Circuits