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In microelectronics, dimensionality miniaturization theoretically leads to reliability increase. However, an important concern in silicon technology is the effective reliability of MOS (metal-oxide semiconductor) devices such as MOSFETs (MOS field-effect transistors) and memory cells as they are scaled to smaller dimensions. Indeed, as the silicon dioxide (SiO2) in CMOS technology is thinned below 2 nm for higher density and performance, limitations associated with the poly-silicon gate become increasingly important. These limitations include increasing poly-depletion effects, high gate resistance, doping impurity penetration,...As a consequence, some problems affecting the CMOS devices reliability appear. Among the main problems, the exponentially increased gate leakage current, the reduced threshold for dielectric breakdown and oxide charging which results in voltage shifts. To avoid these difficulties, group IV nanocrystals embedded in a SiO2 matrix have been studied extensively because of their potential for integrated optoelectronic devices on silicon substrates. The use of silicon (Si) nanocrystals (NCs) instead of standard polycrystalline silicon floating gate was proposed and many studies have been made describing the NC capabilities in different devices (Tiwari et al., 1995; Park et al., 2003; Conibeer et al., 2006). However, due to their large bandgap variations and their potential for bringing a strong quantum confinement, germanium NCs have attracted more interest than Si-NCs as reported in many studies (Choi et al., 1999; Skorupa et al., 2003; Chatterjee et al., 2008). For non-volatile memory device application, a long charge retention time at room temperature is the most important. This is the reason why the study of the NC specific properties is of principal importance. Indeed, device reliabilities are strongly affected by the variation of the NC structural parameters; namely, their density, their size, and consequently the NC spacing. The NC spacing controls the energetic potential recovery of the NCs and promotes the carrier hopping between them. Some of these effects cannot be evaluated by the standard techniques, because the evolution of the curves contains a global 10

Carrier Storage in Ge Nanocrystals Grown on Silicon Oxide by a Two Step Dewetting / Nucleation Process