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The Hilbert transform performs a role to transform band pass signals into low pass signals in wireless communication systems. The operation of Hilbert transform is based on a convolution process which is required adding and multiplying calculations. When the Hilbert transform is designed and hardware-implemented at gate level, the adding and multiplying operation requires a high power consumption and a occupation of wide area on a chip. So the results of adding and multiplying operation cause to degrade the performance of implemented system.In this paper, the new Hilbert transformer is proposed, which has a low hardware complexity by application of MAG(Minimum Adder Graph) algorithm. The proposed Hilbert transformer was simulated in ISE environment of Xilinx and showed the reduction of hardware complexity comparing with the number of gate in the conventional Hilbert transformer.Key Words : SOC, FPGA, Hilbert Transform, MAG algorithm   2010    . *  : (yslee@chungwoon.ac.kr) 10 10 27  (1 10 12 15, 2 11 01 12)  11 01 13

A Study on the Hardware Complexity Reduction of Hilbert transformer by MAG algorithm