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A circuit implemented in CMOS technology that controls the rise and fall times of signals applied to conducting paths of a printed circuit board. The circuit consists of an input inverter circuit stage that controls the slope of an output signal from the inverter stage produced in response to an input signal. A second stage is implemented as a source follower and, in response to the inverter stage output signal, provides the output signal applied to the conducting paths of the printed circuit board. A final stage of the circuit compensates for the inability of the source follower stage to utilize, because of the characteristics of the CMOS field effect transistors, the range of voltages provided by the power supplies. The circuit, by controlling the rise and fall time of signal applied to the printed circuit board, reduces the ringing (i.e. the signal undershoot or overshoot) that can accompany application of pulsed signals to the printed circuit board.

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