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The hardware complexity of the analog Self-Interference (SI) canceler in conventional full duplex Multiple Input Multiple Output (MIMO) designs mostly scales with the number of transmit and receive antennas, thus exploiting the benefits of analog cancellation becomes impractical for full duplex MIMO transceivers, even for a moderate number of antennas. In this paper, we provide an overview of two recent hardware architectures for the analog canceler comprising of reduced number of cancellation elements, compared to the state of the art, and simple multiplexers for efficient signal routing among the transceiver radio-frequency chains. The one architecture is based on analog taps and the other on AUXiliary (AUX) Transmitters (TXs). In contrast to the available analog cancellation architectures, the values for each tap or each AUX TX and the configuration of the multiplexers are jointly designed with the digital transceiver beamforming filters according to desired performance objectives. We present a general optimization framework for the joint design of analog SI cancellation and digital beamforming, and detail an example algorithmic solution for the sum-rate optimization objective. Our representative computer simulation results demonstrate the superiority, both in terms of hardware complexity and achievable performance, of the presented low complexity full duplex MIMO schemes over the relative available ones in the literature. We conclude the paper with a discussion on recent simultaneous transmit and receive operations capitalizing on the presented architectures, and provide a list of open challenges and research directions for future FD MIMO communication systems, as well as their promising applications.

Low complexity full duplex MIMO systems: Analog canceler architectures, beamforming design, and future directions