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The speed of modern digital systems is severely limited by memory latency(the ``Memory Wall'' problem). Data exchange between Logic and Memory is alsoresponsible for a large part of the system energy consumption.Logic--In--Memory (LiM) represents an attractive solution to this problem. Byperforming part of the computations directly inside the memory the system speedcan be improved while reducing its energy consumption. LiM solutions that offerthe major boost in performance are based on the modification of the memorycell. However, what is the cost of such modifications? How do these impact thememory array performance? In this work, this question is addressed by analysinga LiM memory array implementing an algorithm for the maximum/minimum valuecomputation. The memory array is designed at physical level using the FreePDK$\SI{45}{\nano\meter}$ CMOS process, with three memory cell variants, and itsperformance is compared to SRAM and CAM memories. Results highlight that readand write operations performance is worsened but in--memory operations resultto be very efficient: a 55.26\% reduction in the energy--delay product ismeasured for the AND operation with respect to the SRAM read one; therefore,the LiM approach represents a very promising solution for low--density andhigh--performance memories.

Custom Memory Design for Logic-in-Memory: Drawbacks and Improvements over Conventional Memories