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This paper presents the design of a limiting amplifier with 1-to-3 fan-out\udimplementation in a 0.13 µm SiGe BiCMOS technology and gives a\uddetailed guideline to determine the circuit parameters of the amplifier for\udoptimum high-frequency performance based on simplified gain estimations. The\udproposed design uses a Cherry-Hooper topology for bandwidth enhancement and\udis optimized for maximum group delay flatness to minimize phase distortion of\udthe input signal. With regard to a high integration density and a small chip\udarea, the design employs no passive inductors which might be used to boost\udthe circuit bandwidth with inductive peaking. On a RLC-extracted post-layout\udsimulation level, the limiting amplifier exhibits a gain-bandwidth-product of\ud14.6 THz with 56.6 dB voltage gain and 21.5 GHz 3 dB bandwidth at a\udpeak-to-peak input voltage of 1.5 mV. The group delay variation within the\ud3 dB bandwidth is less than 0.5 ps and the power dissipation at a power\udsupply voltage of 3 V including output drivers is 837 mW

Design of a 0.13 µm SiGe Limiting Amplifier with 14.6 THz Gain-Bandwidth-Product