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The design of CMOS analog circuitry for acquiring 12 lead ECG is presented. The existing methods employ separate multiplexers and associated circuitry for signal acquisition operating at typical voltage of ± 5V. The proposed system employs dynamic threshold logic to achieve low power, wide dynamic range good linearity with a supply voltage of 0.4V. The power dissipation obtained was 22.12µW. Utilizing the dynamic threshold logic the proposed circuitry is implemented with 0.18µm CMOS technology. This ECG \udsignal processor is highly suitable for wearable applications of long term cardiac monitoring

A Low Power Front End Analog Multiplexing Unit for 12 Lead ECG Signal Acquisition