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The high-precision flip-chip bonding technologies in 20μm pitch are applied to connect the copper plugs through the Si devices with the micro bumps formed on the each copper plug for 3D LSI. Generally, it is said that the ultrasonic flip-chip bonding (UFB) technologies are preferable bonding process as the interconnections at low profile and low temperature. In this paper, the possibilities of hyperfine interconnections utilizing electroplated Au bumps in 20μm-pitch are discussed on the chip on chip (COC) structure as feasibilities. First, the basic bondabilities on the sputtered Au film were evaluated. The effect of the ultrasonic and the sputter cleaning of the bump surface were confirmed. Secondly, the possibilities of the micro-joints were confirmed on the electroless nickel and the gold (Ni/Au) plated film as the result of the evaluation on the tensile strength. At last, the possibilities of the interconnections utilizing UFB in 20μm-pitch between the electroplated gold bumps and the electroless Ni/Au plated bumps were found out at the cross-section. The all achievement of the basic studies on the packaging process will realize the 3D LSI in the near future, which is proud of the scalabilities and the higher-performance. The subjects are the selection of the optimized process conditions and the establishment of the micro-joint reliabilities utilizing UFB process.

Feasibilities on Ultrasonic Flip-Chip Bonding in 20 .MU.m-pitch for COC Structure.