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This paper introduces a new method regarding deuterium incorporation in the gate dielectric including deuteriumimplantation and post-annealing at the back-end-of-the process line. The control device and the deuterium furnaceannealeddevice were also prepared for comparison with the implanted device. It was observed that deuteriumimplantation at a light dose of 1×1012 - 1×1014/cm2 at 30 keV reduced hot-carrier injection (HCI) degradation andnegative bias temperature instability (NBTI) within our device structure due to the reduction in oxide charge andinterface trap. Deuterium implantation provides a possible solution to enhance the bulk and interface reliabilities ofthe gate oxide under the electrical stress

Suppression of Gate Oxide Degradation for MOS Devices Using Deuterium Ion Implantation Method