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We present a formal model built for verification of the hardware Tera-ScaleARchitecture (TSAR), focusing on its Distributed Hybrid Cache CoherenceProtocol (DHCCP). This protocol is by nature asynchronous, concurrent anddistributed, which makes classical validation of the design (e.g. throughtesting) difficult. We therefore applied formal methods to prove essentialproperties of the protocol, such as absence of deadlocks, eventual consensus,and fairness.

Modeling a Cache Coherence Protocol with the Guarded Action Language