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In this paper, we formally define Test Case Sequence Diagrams (TCSD) as aneasy-to-use means to specify test cases for components including timingconstraints. These test cases are modeled using the UML2 syntax and can bespecified by standard UML-modeling-tools. In a component-based design an earlyidentification of errors can be achieved by a virtual integration of componentsbefore the actual system is build. We define such a procedure which integratesthe individual test cases of the components according to the interconnectionsof a given architecture and checks if all specified communication sequences areconsistent. Therefore, we formally define the transformation of TCSD intotimed-arc Petri nets and a process for the combination of these nets. Theapplicability of our approach is demonstrated on an avionic use case from theARP4761 standard.

Sequence Diagram Test Case Specification and Virtual Integration Analysis using Timed-Arc Petri Nets