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Since the number of cores integrated on a single die is expected to increase steadily, new memory and communication architectures as well as programming methods are needed and currently explored by manufacturers. In this context, Intel Labs developed the Single-chip Cloud Computer (SCC), a 48-core experimental processor, serving as a platform for many-core software research. Within this paper a framework targeting the investigation of SystemC kernel parallelization on the SCC is presented. The framework provides the basis for implementation of different synchronization schemes while combining distributed and shared memory programming models and exploiting multiple distinct address spaces. As a case study, a synchronous parallelization scheme is preliminarily evaluated by means of several simulation models of different accuracy. Results of the analysis give a first evidence of the applicability of the synchronous parallelization method on the homogeneous non-cache coherent manycore architecture of the SCC for detailed system simulation.

A Framework for Exploration of Parallel SystemC Simulation on the Single-chip Cloud Computer