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In this paper we present a prototype for a spectrum sensing node for a cognitive radio sensing network. Our prototype consists of a custom down-conversion front-end with an RF input frequency range from 300 MHz to 3 GHz and a Power Spectral Density (PSD) estimation algorithm implemented on a Virtex-6 Field Programmable Gate Array (FPGA). The base-band processing part is capable of calculating the PSD for a bandwidth upto 245.76 MHz achieving a resolution of 60 kHz and an online variable averaging functionality with a maximum of 32767 averages. We show the arithmetic optimization techniques used for the PSD evaluation to optimize FPGA resource usage. Real time performance and calculation of the PSD for real world signals in the GSM downlink, DECT and the UHF DVB-T bands are demonstrated

A Hardware Prototype of a Flexible Spectrum Sensing Node for Smart Sensing Networks