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In this paper, an eight order efficient digital infinite impulse response filter is designed to improve the signal to noise ratio (SNR) and minimise the hardware and power consumption. For this task, an optimisation method has been adapted to reduce the root mean square error and hardware usage. The filter has been designed and analysed using Matlab and Modelsim, the implementation has been synthesis on Xilinx Spartan 3E-100 (xc3s100e) field-programmable gate array board. Moreover, an optimisation process using parallel algorithm has bee adapted for further reduction in the hardware area and power consumption. The results show the Band Pass Filter effectively functions in real time recording application with significant improvement in the SNR which could achieve high-velocity selective resolution. The present work offers a structure of implementing a band-pass filter on FPGAs using a nonlinear digital filter shows a significant saving of 25.4% in power consumption and 29.9% of the hardware size comparing with the latest algorithm of IIR filter design. Consequently, this is an essential development to enhance the neural signals to be adopted as reference or control signals in artificial limbs devices.

Optimised Design and Implementation of Band-Pass Filter for Neural Recording System