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Due to the tremendous increase in the call of handheld devices like mobile, iPods and tablets; certain applications like space and biomedical, it is necessary to have low power consuming digital systems. As a crucial part in digital systems,Static Random Access Memory(SRAM) should consume low power since it occupies about 70% of the total chip area. As the technology is shrinking, SRAM’s leakage power in standby condition is becoming a most critical concern for the low power applications. This paper gives a study of different leakage components present in SRAM and discusses about various current reduction techniques which include Gated VDD, MTCMOS, Dual threshold and Transistor Stacking. Keywords— SRAM, Leakage power, Gated VDD, MTCMOS, Dual threshold, Transistor stacking

Leakage Current Alleviation Techniques for SRAM Cell