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This paper presents a magnetically sensitive transistor using a nc-Si:H/c-Si heterojunction as an emitter junction. By adopting micro electro-mechanical systems (MEMS) technology and chemical vapor deposition (CVD) method, the nc-Si:H/c-Si heterojunction silicon magnetically sensitive transistor (HSMST) chips were designed and fabricated on a p-type &lt;100&gt; orientation double-side polished silicon wafer with high resistivity. In addition, a collector load resistor ( R L ) was integrated on the chip, and the resistor converted the collector current ( I C ) to a collector output voltage ( V out ). When I B = 8.0 mA, V DD = 10.0 V, and R L = 4.1 kΩ, the magnetic sensitivity ( S V ) at room temperature and temperature coefficient ( α C ) of the collector current for HSMST were 181 mV/T and -0.11%/°C, respectively. The experimental results show that the magnetic sensitivity and temperature characteristics of the proposed transistor can be obviously improved by the use of a nc-Si:H/c-Si heterojunction as an emitter junction.

Fabrication Technology and Characteristics of a Magnetic Sensitive Transistor with nc-Si:H/c-Si Heterojunction