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An ever-growing market demand for board (second) level packages (e.g., embedded systems, system-on-a-chip, etc.) poses newer challenges for its manufacturing industry in terms of competitive pricing, higher reliability, and overall dimensions. Such packages are encapsulated for various reasons including thermal management, protection from environmental conditions and dust particles, and enhancing the mechanical stability. In the due course of reducing overall sizes and material saving, an encapsulation as thin as possible imposes its own significance. Such a thin-walled conformal encapsulation serves as an added advantage by reducing the thermo-mechanical stresses occurring due to thermal-cyclic loading, compared to block-sized or thicker encapsulations. This paper assesses the encapsulation process of a board-level package by means of thermoset injection molding. Various aspects reviewed in this paper include the conception of a demonstrator, investigation of the flow simulation of the injection molding process, execution of molding trials with different encapsulation thicknesses, and characterization of the packages. The process shows a high dependence on the substrate properties, injection molding process parameters, device mounting tolerances, and device geometry tolerances. Nevertheless, the thermoset injection molding process is suitable for the encapsulation of board-level packages limiting itself only with respect to the thickness of the encapsulation material, which depends on other external aforementioned factors.

An Assessment of Thermoset Injection Molding for Thin-Walled Conformal Encapsulation of Board-Level Electronic Packages