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This paper presents a one-transistor dynamic random-access memory (1T-DRAM) cell based on a gate-all-around junction-less field-effect transistor (GAA-JLFET) with a Si/SiGe heterostructure for high-density memory applications. The proposed 1T-DRAM achieves the sensing margin using the difference in hole density in the body region between ‘1’ and ‘0’ states. The Si/SiGe heterostructure forms a quantum well in the body and reduces the band-to-band tunneling (BTBT) barrier between the body and drain. Compared with the performances of the 1T-DRAM with Si homo-structure, the proposed 1T-DRAM improves the sensing margin and retention time because its storage ability is enhanced by the quantum well. In addition, the thin BTBT barrier reduced the bias condition for the program operation. The proposed 1T-DRAM showed a high potential for memory applications by obtaining a high read current ratio at ‘1’ and ‘0’ states about 108 and a long retention time above 10 ms.

One-Transistor Dynamic Random-Access Memory Based on Gate-All-Around Junction-Less Field-Effect Transistor with a Si/SiGe Heterostructure