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In this paper, we~present a novel scheduling solution for a class ofSystem-on-Chip (SoC) systems where heterogeneous chip resources (DSP, FPGA,GPU, etc.) must be efficiently scheduled for continuously arriving hierarchicaljobs with their tasks represented by a directed acyclic graph. Traditionally,heuristic algorithms have been widely used for many resource schedulingdomains, and Heterogeneous Earliest Finish Time (HEFT) has been a dominatingstate-of-the-art technique across a broad range of heterogeneous resourcescheduling domains over many years. Despite their long-standing popularity,HEFT-like algorithms are known to be vulnerable to a small amount of noiseadded to the environment. Our Deep Reinforcement Learning (DRL)-based SoCScheduler (DeepSoCS), capable of learning the "best" task ordering underdynamic environment changes, overcomes the brittleness of rule-based schedulerssuch as HEFT with significantly higher performance across different types ofjobs. We~describe a DeepSoCS design process using a real-time heterogeneous SoCscheduling emulator, discuss major challenges, and present two novel neuralnetwork design features that lead to outperforming HEFT: (i) hierarchical job-and task-graph embedding; and (ii) efficient use of real-time task informationin the state space. Furthermore, we~introduce effective techniques to addresstwo fundamental challenges present in our environment: delayed consequences andjoint actions. Through an extensive simulation study, we~show that our DeepSoCSexhibits the significantly higher performance of job execution time than thatof HEFT with a higher level of robustness under realistic noise conditions.We~conclude with a discussion of the potential improvements for our DeepSoCSneural scheduler.

DeepSoCS: A Neural Scheduler for Heterogeneous System-on-Chip (SoC) Resource Scheduling