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In this paper we present a study of a silicon-based Single-Photon Avalanche Diode (SPAD) in the near-infrared band with double buried layers and deep trench electrodes fabricated by the complimentary metal–oxide semiconductor (CMOS) technology. The deep trench electrodes aim to promote the movement of carriers in the device and reduce the transit time of the photo-generated carrier. The double buried layers are introduced to increase the electric field in the avalanche area and withstand a larger excess bias voltage as its larger depletion region. The semiconductor device simulation software TCAD is used to simulate the performance of this SPAD model, such as the I-V characteristic, the electric field and the Photon Detection Efficiency (PDE). Further optimization of the structure are studied with influence factors such as the doping concentration and depletion region thickness. Based on the results in this study, the designed a structure that can provide a high detecting efficiency in the near-infrared band.

Simulation Study of Silicon-Based Single-Photon Avalanche Diodes with Double Buried Layers and Deep Trench Electrodes