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Laser detection and ranging (LADAR) systems are commonly used to acquire real-time three-dimensional (3D) images using the time-of-flight of a short laser pulse. A static unitary detector (STUD)-based LADAR system is a simple method for obtaining real-time high-resolution 3D images. In this study, a switched 4-to-1 transimpedance combining amplifier (TCA) is implemented as a receiver front-end readout integrated circuit for the STUD-based LADAR system. The 4-to-1 TCA is fabricated using a standard 0.18 μm complementary metal-oxide-semiconductor (CMOS) technology, and it consists of four independent current buffers, a two-stage signal combiner, a balun, and an output buffer in one single integrated chip. In addition, there is a switch on each input current path to expand the region of interest with multiple photodetectors. The core of the TCA occupies an area of 92 μm × 68 μm, and the die size including I/O pads is 1000 μm × 840 μm. The power consumption of the fabricated chip is 17.8 mW for a supplied voltage of 1.8 V and a transimpedance gain of 67.5 dBΩ. The simulated bandwidth is 353 MHz in the presence of a 1 pF photodiode parasitic capacitance for each photosensitive cell

Switched 4-to-1 Transimpedance Combining Amplifier for Receiver Front-End Circuit of Static Unitary Detector-Based LADAR System