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This paper presents an improved investigation into the effects of temperature-dependent parasitic elements on the silicon carbide (SiC) MOSFET power losses. Based on the physical knowledge of MOSFET, a circuit-level loss analytical model is proposed, which takes the parasitic elements of the power devices and the stray inductances of the Printed Circuit Board (PCB) traces into consideration. The state equations derived from the equivalent circuit of each stage is solved by iteration to calculate the loss in the switching transients. In order to study the temperature characteristic completely, the key parameters needed in the calculation are extracted from power device test platform based on Agilent B1505A. The loss assessment of the proposed analytical model with varied elements has been successfully substantiated by the experimental results of a 400-V, 15-A double-pulse-test bench. Finally, some practical knowledge about loss mechanisms is given to help estimate the power losses and optimize the efficiency of power converters.

An Improved Investigation into the Effects of the Temperature-Dependent Parasitic Elements on the Losses of SiC MOSFETs