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In order to understand higher brain functions, it is necessary to simulate macroscale circuits involving multiple areas of the brain. Such brain-scale networks represent a challenge to current simulation technology, as design solutions that are appropriate for simulating local cortical networks lead to unreasonable serial memory overhead when the network is scaled up by one or two orders of magnitude. We quantify these limitations and present strategies for overcoming them on computer architectures with up to 10k processors. 1 Linking microscale to macroscale

Simulating macroscale brain circuits with microscale resolution