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Efficient brain simulation is a scientific grand challenge, aparallel/distributed coding challenge and a source of requirements andsuggestions for future computing architectures. Indeed, the human brainincludes about 10^15 synapses and 10^11 neurons activated at a mean rate ofseveral Hz. Full brain simulation poses Exascale challenges even if simulatedat the highest abstraction level. The WaveScalES experiment in the Human BrainProject (HBP) has the goal of matching experimental measures and simulations ofslow waves during deep-sleep and anesthesia and the transition to other brainstates. The focus is the development of dedicated large-scaleparallel/distributed simulation technologies. The ExaNeSt project designs anARM-based, low-power HPC architecture scalable to million of cores, developinga dedicated scalable interconnect system, and SWA/AW simulations are includedamong the driving benchmarks. At the joint between both projects is the INFNproprietary Distributed and Plastic Spiking Neural Networks (DPSNN) simulationengine. DPSNN can be configured to stress either the networking or thecomputation features available on the execution platforms. The simulationstresses the networking component when the neural net - composed by arelatively low number of neurons, each one projecting thousands of synapses -is distributed over a large number of hardware cores. When growing the numberof neurons per core, the computation starts to be the dominating component forshort range connections. This paper reports about preliminary performanceresults obtained on an ARM-based HPC prototype developed in the framework ofthe ExaNeSt project. Furthermore, a comparison is given of instantaneous power,total energy consumption, execution time and energetic cost per synaptic eventof SWA/AW DPSNN simulations when executed on either ARM- or Intel-based serverplatforms.

The Brain on Low Power Architectures - Efficient Simulation of Cortical Slow Waves and Asynchronous States