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With the ever-increasing design scales of electronic products and weapons, it is essential to make a design for testability (DFT) in the process of product research and development. To confirm the correctness of testability design and analysis, it is necessary to perform testability verification for the product. Testability verification refers to those work conducted for examining whether the designed products meet testability requirement or the test and analysis to ascertain whether the equipment is up to the testability demand. As a result, testability verification has become an important tool for identifying the defects of the design, checking whether the product is fully implemented. In testability verification, the mode of failure is a low failure rate, but if it happens, it will spread to other components, which will affect the scale of the impact. Once it happens, the fault will propagate and spread to other elements and cause huge impact. If the DFT about propagated fault is incomplete, once the propagated fault happens but not be detected and isolated correctly, the threats of the propagated fault to consumers are roughly the same with the total usual risks. So it should make an important sampling to the propagated fault during extracting failure mode to reduce the consumers’ risk. Therefore, in order to reduce the risk of the use of the transmission mode, we should do the important sampling of the fault mode. In this paper, a fault propagation model is established, which is based on the fault propagation model set that is based on fault propagation. Then it describes the principle of fault propagation, and finally through the ant colony algorithm, this paper solves the fault propagation path and optimizes selection of fault sample mode. Keywords-testability verification; testability integrated evaluation; failure sample optimization selection; failure propagation; ant colony algorithm

Ant Colony Algorithm Based Fault Pattern Optimization in Test Verification