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The possible nano-crystallization formation and thicker interface layer at the higher annealing atmosphere, however, is easy to suppress the superiority of high-k dielectric deposition in the improvement of drive current and reliability. This phenomenon was apparently observed at 900C annealing tested devices after the nitridation process. The drive current at 900C annealing before hot-carrier stress is lower than that at 700C with the same nitrogen concentration and the same feature sizes. After the hot-carrier stress test at 125C ambience, the degradation of the threshold voltage shift at 900C is still the worst among all of tested samples. Keywords-hot carrier stress; drive current; high-k; MOSFET; anneal; metal-gate; DPN

DPN Treatment plus Annealing Temperatures for 28nm HK/MG nMOSFETs with CHC Stress