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In this paper, a general analytical calculation of dc-link current and voltage ripple is presented for three-level three-phase neutral-point-clamped voltage source inverter (3L-NPC-VSI). Based on the analysis of average dc-link current of the upper and lower switches, the low-frequency oscillation of the neutral point (NP) voltage can be eliminated by injecting a zero sequence component. Moreover, the general expression of the root-mean-square (RMS) dc-link current is derived. In addition, the dc-link average current, rms current, and voltage ripple of the 3L-NPC-VSI are compared with those of the 2L-VSI, and it shows similar dc-link characteristics. Simulation results are shown to verify the theoretical analysis. The results can be extended to any PDPWM with NP voltage control strategy. Introduction Multilevel converters have drawn tremendous interest in the power industry, transportation, and renewable energy [1]. Among these topologies, the three-level three-phase neutral-point-clamped voltage source inverter (3L-NPC-VSI) shown in Fig. 1 is the most popular one [2]. For proper operation of this topology, the modulation strategy must be designed to achieve voltage balancing between upper and lower capacitors [3]-[6]. Although the neutral-point (NP) voltage balancing can be achieved, the derivation of the algorithm is difficult to understand, due to the complex calculation of the NP current. Moreover, the general expressions of average and root-mean-square (rms) dc-link current and voltage have not been derived for 3L-NPC-VSI, although the dc-link current ripple analysis has been investigated for PWM-VSI [7]-[8]. In this paper, a general analytical calculation of dc-link current and voltage ripple is presented for 3L-NPC-VSI. It is found that the low-frequency NP voltage oscillation can be eliminated on the basis of the analysis of the average dc-link current. Moreover, both 2L-VSI and 3L-NPC-VSI show similar dc-link characteristics, in terms of the average current, rms current, and voltage ripple. Simulation results are shown to verify the theoretical analysis. Circuit Analysis of 3L-NPC-VSI Fig. 1 shows the topology of a traditional 3L-NPC voltage inverter. The inverter bridge and load can be simplified as a current source idc in the equivalent circuit as shown in Fig. 2. The constant dc current comes from the DC source due to the infinite impedance of the capacitor for dc frequency. The capacitor Cdc (total dc-link capacitance) and inductance Ldc constitute the LC filter to attenuate the harmonic current through the DC source. From Fig. 1, the dc-link current idc,up and idc,down of 3L-NPC-VSI are determined by , 1 1 1 dc up Qa a Qb b Qc c i S i S i S i = + + (1) , 4 4 4 dc down Qa a Qb b Qc c i S i S i S i = + + (2) where ia, ib, and ic are the output currents of the inverter bridge, and Sx (x represents the switches Qa1, Qa2, etc.) are the switch functions, respectively. 2nd International Conference on Electrical, Computer Engineering and Electronics (ICECEE 2015) © 2015. The authors Published by Atlantis Press 659 Fig. 1: 3L-NPC-VSI topology. Fig. 2: Equivalent circuit for dc-link. Average and RMS Values of DC-Link Current A. Average Value of DC-Link Current The traditional SPWM three-phase reference voltages vx,ref (normalized w.r.t Vdc/2) and the corresponding duty cycles δx1 and δx4 for 3L-VSI are given by (3) and (4) below respectively ( ) , cos x ref x v m θ θ = + (3) , , 1 , , 0 0, 0 x ref x ref x x ref v if v if v δ ≥  =  <  , 4 , , 0, 0 , 0 x ref x x ref x ref if v v if v δ ≥  = − <  (4) Where m is the inverter modulation index, and x for phases a, b and c. Especially x θ is equal to =0 a θ , 2 / 3 b θ π = − and 2 / 3 c θ π = , respectively. In this paper, the analysis is based on the in-phase disposition PWM (PDPWM). The reference signals and the carrier waveforms are shown in Fig. 3. According to the modulation principle of 3L-NPC-VSI, one fundamental period can be divided into six sectors I VI − and each sector is further divided into A and B. Assuming that the load is linear and ignoring the high frequency current harmonics of the inverter bridges, the three phase output phase current x i are given by ( ) cos x m x i I θ θ φ = + − (5) Where m I is the current peak value, φ is the power angle of the inverter load. Fig. 4 shows the detailed PWM waveforms over one carrier period during sector I-A and I-B for 3L-NPC-VSI. Table 1 present the procedures to derive the average and rms values of dc-link current for sector I-A and I-B. It should be noted that the average values expression iup,ave and idown,ave represent the average values over a carrier period, but the rms values expression Iup,rms and Idown,rms are calculated based on fundamental period.

A General Analytical Calculation of DC-Link Current and Voltage Ripple for 3L-NPC-Voltage Source Inverter