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The use of Silicon-On-Insulator (SOI) technology allowed the development of smaller devices with better performance than the conventional silicon bulk transistors. Nevertheless, some undesired effects such as short channel effects are still present for smaller transistors. The use of multiple gate devices is pointed as one of the possible solutions to minimize such short channel effects [1]. The Multiple-Gate Field Effect Transistors (MuGFETs) are devices with more than one gate, usually connected at the same potential, and can be built with threedimensional structures. The device that is analyzed in this paper is a surrounding gate device called CYNTHIA that is a transistor with a cylindrical vertical silicon pillar with the gate constructed surrounding this pillar, as seen in Fig. 1. The CYNTHIA transistor offers superior device performance, with high sheet electron concentration, ideal subthreshold characteristics, and enhanced electron mobility in the channel [2]. Due to the cylindrical geometry the surface electric field falls isotropically from the interface and shows continuous values around the silicon pillar. Since the CYNTHIA transistor has a cylindrical gate, the silicon-dielectric interface crystallographic orientation varies continuously around the silicon pillar. The carrier mobility is highly dependent on the crystallographic orientation of the gate silicon-dielectric interface planes [3] and this dependence must be accounted in MuGFETs simulations. The drain current direction in CYNTHIA transistor is in direction <001> and the surface plane orientation can be considered continuously variable. ABSTRACT

A Simple Electron Mobility Model Considering the Silicon-Dielectric Interface Orientation for Circular Surrounding-Gate Transistor