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In this study, we conducted electrical via chain yield tests for the purpose of verifying the total process performance of directed self-assembly (DSA) contact hole shrink process. DSA was utilized on the via level connecting between two metal levels. From the analysis of single via resistance data, the best process condition was determined and the via chain yield was obtained. The best yield was 74% at the via chain size of 2.3k and one chip passed the test at the via chain size of 358k. In order to find the root cause of the via chain yield degradation, the failure location was identified by absorbed electron current images and STEM images were taken. It was found that the via did not contact the lower metal level at the failure location. However, we concluded that it was not necessarily caused by DSA process because such failure mode was also observed for the via chains without DSA. Although the via chain size tested at the pre-production stage is much larger by orders of magnitude than the via chain size tested in this study, we believe that significant progress has been made in this study toward semiconductor device manufacturing using DSA contact hole shrink process. Keyword: directed self-assembly, graphoepitaxy, block copolymer, PS-b-PMMA, hole shrink, via chain yield

Electrical Via Chain Yield for DSA Contact Hole Shrink Process