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This paper deals with a new concept of virtual testing engine for analogue-to-digital converters (ADCs). The whole system consists of program procedures to extract the most important ADC errors expressed in terms of integral and differential non-linearity (INL and DNL). The developed testbench is especially suitable for educational purpose because of modular conception of the system. The proposed testing engine is implemented in Maple™, bringing an ideal possibility to make a complex system for the simulations of ADC at the virtual level as well as at the circuit level. The system is a part of a complex environment using the Servo-loop and the Histogram method, combining their features so as to obtain high level of versatility. However, in this paper we concentrate only on the results from the Servo-loop method. The Servo-loop solution proposed here employs an effective search algorithm and improves convergence properties resulting in a significant reduction of the simulation time. HE MAIN TASK of testing analogue-to-digital converters is to obtain high performance ADC with the short response time and high resolution. The ADC performance is expressed in terms of integral and differential non-linearity (INL and DNL) and depends on many parameters present in the analogue design part. According to the test setup, the existing performance extraction methods can be classified into closed-loop or open-loop category (1). The virtual testing engine proposed in this article uses one of the widely used ADC performance extraction methods (2), the Servo-Loop, as a representative of the closed-loop category. The system part of the virtual testing engine is programmed in the software Maple™, allowing the algorithm execution and bringing a great advantage in the possibility of subsequent ADC modelling. The background of the conventional implementation of Servo-Loop method is also described here, pointing out not only its strong features but also disadvantages. Finally, some improvements of the weak points are presented, proposing a novel Servo-Loop implementation.

A Virtual A/D Converter Testbench for Educational Purpose — Development and Results