English (United Kingdom)

https://curated-unify.zendy.io/wp-json/zendy-region/v1/featured_content/oa?rat=en

https://curated-unify.zendy.io/wp-json/zendy-region/v1/highlighted_journal/

Global: Zendy Plus annual

Presents the access of premium content as premium feature

Premium Content

Presents the keyphrase highlighting as premium feature

Keyphrase Highlighting

Presents the summarisation as premium feature

Summarisation

Insights

Presents the pdf analysis as premium feature

PDF Analysis

Presents the zaia usage as premium feature

ZAIA

Global: Zendy Tools annual

Global: Zendy Free Plan

Global: Zendy Tools monthly

Global: Zendy Plus monthly

In this paper, we have suggested a simple scheme for prime-factor decomposition of Inverse Discrete Sine Transform (IDST) and systolic mesh architecture for its efficient implementation. In the systolic architecture the transposition of the intermediate matrix is avoided in this structure by orthogonal processing during the pair of matrix multiplication i.e., if the processing for the first matrix multiplication takes place along X-direction, the processing for the second matrix multiplication is carried out along Y-direction. Due to this feature, the systolic architecture is highly compact, offers saving for transposition hardware and at the same time yields high throughput with less latency. The proposed systolic architecture has very less area complexity, less computation time and very high VLSI performance measures compared with existing structures. Due to orthogonal nature of the Discrete Sine Transform (DST), the forward transform may however be realized by the transpositions of the inverse transform.

A Prime-Factor Algorithm for the Inverse Discrete Sine Transform and its Architecture