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This paper deals with two types of inverter structure design using CMOS and adiabatic technique. Power consumption is one of the basic parameters of any kind of integrated circuit (IC). Power and performance are always traded off to meet the system requirements. Power has a direct impact on the system cost. Adiabatic circuits are those circuits which work on the principle of adiabatic charging and discharging and which recycle the energy from output nodes instead of discharging it to ground. Conventional CMOS circuits achieve a logic ‘1’ or logic ‘0’ by charging the load capacitor to supply voltage Vdd and discharging it to ground respectively. All simulation result performs on 180nmTMCS technology and to analysis the power consumption of both CMOS and adiabatic logic.

Design and Analysis of CMOS Cell Structures using Adiabatic Logic