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In general, the FPU and processor are decoupled in the method for FPU integration, in which the communication between them requires software intervention and ultra-precision FPU is unsupported. To avoid this problem, a method based on fine-grained control for integration of FPU into the RISC processor is proposed in this paper. In terms of operand width of floating-point instructions, the method divides floating instructions into three categories: S, D and U, and further subdivides the execution status of S, D and U. Then, it regards the execution status as basic granularity to generate the FPU control information and moves the control information needed by destination operands to the next pipeline stage. Finally, segmentation of destination operands is achieved in different pipeline stages and the destination operand is written to register file after segmentation with the pipeline. An 80-bit FPU is embedded into a SPARC V8 processor based on the proposed method. The results of implementation and verification show that the critical path of floating instructions decreases by 37.3%, hardware consumption reduces by 16.9% and the floating-point calculation efficiency increases 1.7 times. The proposed method can be used to apply the ultra-precision FPU embedded into the RISC processor, and to make an efficient collaborative computing between them at low hardware overheads.

Retraction Notice: Method for Ultra-precision FPU Integration based on Fine-Grained Control