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Resistive Plate Chambers for Hadronic Particle-Flow calorimetry will have a large number of pixels. We present tests of a system for readout with parallel vertical shift registers, somewhat like that used in CCD imaging. In our case we discriminate on the signal immediately after amplification and shaping, and only shift single bits. We discuss the issues involved in a particular model for using off-the-shelf commercial chips for readout on a moderate scale. We have a 32 channel prototype in operation on an RPC, and we describe tests with the amplifiers etc leading up to this. The prototype is an example of a layout for the chips to be mounted on the readout pad for an RPC to make a thin assembly. Comparisons to other systems are made for cost scaling, modes of operation, etc. This particular implementation uses analog delay instead of a digital pipeline, and has no clock on the board during detector live time. This RPC readout system could be implemented quickly. Production of this system should have minimal start-up costs and minimal start-up times. One advantage of the present system would be to provide readout of large numbers of channels on a short development time scale at low cost. This would allow initial tuning of the reconstruction and analysis software in a test beam before other readout systems are ready. It also provides risk management by development of another technology at small additional cost

Proposal for a shift register approach to RPC calorimeter readout for test beam, cosmics, and sources.