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Dept. of Information Security Engineering, Mokpo National University     ,               .   224 ECDSA             .   GUI     . : , ECDSA,  ,  ,  Abstract Hardware are developed in various architecture. It is necessary to verifying value of variables inmodules generated in each clock cycles for timing simulation. In this paper, a test vector generator in softwaretype generates test vectors for timing simulation of 224-bit ECDSA hardware modules in developing stage. It provides test vectors with GUI format and text file format. Key Words : Digital Signature, ECDSA, Test Vectors, Timing Simulation, Hardware Architecture

Test Vector Generator of timing simulation for 224-bit ECDSA hardware