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Network on Chip (NoC) is used as an appropriate solution to solve the communication problems in System on Chip (SoC). Due to the advanced VLSI technology the power consumption has become a major part in NoCs. In this article we compare the effect of different routing algorithms and topologies on power dissipation in NoCs. This paper illustrates the efficacy of low power encoding approach on power consumption in on chip networks. We assess the impact of deterministic, partially adaptive and fully adaptive routing algorithms and also mesh and torus topologies with and without using low power encoding algorithm on link and total power consumption in NoC.

Effective Routing Algorithm and Topology on Power Consumption in Networks on Chip