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The field programmable gates array (FPGA) microchip is applied to achieve considerable performance gain in simulation of tsunami wave propagation using personal computer. The two-step Mac-Cormack scheme was used for approximation of the shallow water equations. An idea of PC-based tsunami wave propagation simulation is described. Comparison with the available analytic solutions and numerical results obtained with the reference code show that developed approach provides good accuracy in simulations. It takes less then 1 minute to compute 1 hour of the wave propagation in computational domain that contains 3000 × 2500 nodes. Using the nested greed approach, it is possible to decrease the size of space step from about 300 meters to 10 m. Using the proposed approach, the entire computational process (to calculate the wave propagation from the source area to the coast) takes about 2 min. As an example the distribution of maximal heights of tsunami wave along the coast of the Southern part of Japan is simulated. In particular, the interrelation between maximal wave heights and location of tsunami source is studied. Model sources of size 100 × 200 km have realistic parameters for this region. It was found that only selected parts of the entire coast line are exposed to tsunami wave with dangerous height. However, the occurrence of extreme tsunami wave heights at some of those areas can be attributed to the local bathymetry. The proposed hardware acceleration to compute tsunami wave propagation can be used for rapid (say, during few minutes) evaluation of danger from tsunami wave for a particular location of the coast

Fast Modelling of Tsunami Wave Propagation using PC with Hardware Computer Code Acceleration